The LSV seminar takes place on Tuesday at 11:00 AM. The usual location is the conference room at Pavillon des Jardins (venue). If you wish to be informed by e-mail about upcoming seminars, please contact Stéphane Le Roux and Matthias Fuegger.
The seminar is open to public and does not require any form of registration.
Abstract. Visualisation techniques can enhance the understanding of circuit behaviour and their operating environment.
Visualisation enables exploration of massive quantities of data from a high-level overview right down to
low-level detail. During the presentation I will show two short animated movies that address clock domain
crossing circuits, and whole-chip clock distribution. These visualisation aids are used to tune and debug
designs, and have uncovered problems not found by the standard development tools.
Short bio. Ian completed his PhD in Electrical Engineering at Imperial College, London in 1986. He was introduced to asynchronous circuit and systems design while working with Sutherland, Sproull and Associates, Inc. In 1987 Ian went to work in the Advanced Technology Group at Apple Computer. At Apple he helped develop a software-programmable gate array chip prototype -- one of his few clocked chip designs. He joined Sun Labs in 1992, which became Oracle Labs in 2010, where he has continued research work focusing on high speed asynchronous circuits and clock domain crossing circuits. Ian works closely with designers in product divisions, applying asynchronous circuit techniques to help improve their products.